Amelia's Weekly Fish Fry

Thermal Trials and Temperature Tales

We all know that today’s engineering teams are facing increasing challenges surrounding thermal aware designs. Whether you are designing a board, an IC, or a system, we all struggle with thermal and electrical simulation at one point or another. In this week’s Fish Fry, Jerry Zhao (Cadence Design Systems) and I discuss the challenges of thermal and electrical simulation and the benefits of electrical and thermal co-simulation of multi-physics designs.

Hyperscale to the Rescue!

In this week’s podcast we take a closer look at how the increase of machine to machine data traffic has encouraged a movement toward spine leaf architecture and die-to-die connectivity in hyperscale data centers. Manmeet Walia (Synopsys) joins me this week to discuss the evolution of data center technology and how the challenges surrounding cache currency and network functionality is driving change in the world of hyper scale data centers.  Also this week, we check out a new Kickstarter campaign called Flash Forest that is looking to plant a billion trees by 2028 with a little help from a specialized fleet of drones! 

 

All of the Information: The Good, The Bad, and the Ugly

Did you know that over a hundred devices are connected to the internet every second? In this week’s episode of Fish Fry, we take a closer look at the challenges facing us as we develop the next generation of connected devices. Tom Doyle (CEO - Aspinity) joins me to discuss the details of Aspinity’s innovative RAMP (Reconfigurable Analog Modular Processor) platform, the "deal breakers" as he sees them when it comes to IoT designs, and why the answer to our always-on, always-sensing power challenges is architectural. Also this week, we check out Kickstarter’s Make 100 campaign and a new kind of high-performance multilayer piezo speaker from TDK called PiezoListen.  

 

So Many Verification Cycles, So Little Time

Are you ready for an EDA smorgasbord? In this week’s episode of Fish Fry, we are laying out virtual buffet of emulation, hardware assisted development, enterprise prototyping, and parser platforms for your friday podcasting pleasure. First up, Frank Schirrmeister (Cadence Design Systems) joins us to dish about our growing thirst for verification, the benefits of FPGA based prototyping and why hardware-assisted development is more and more important these days. Also this week, Michiel Ligthart (President and COO - Verific) chat about the role of parsers in the EE community and why Verific chose a giraffe to be its mascot.

Driving Optimization

What do high level synthesis, FPGAs, and the first 3D printer capable of printing fully-functional electronics have in common? This week's podcast, of course! First up, I chat with Max Odendahl (CEO, Founder - Silexica) about ins and outs of system level understanding and optimization, what we can do with unsynthesizable C/C++ code and how we can tackle the biggest challenges in using Software  (C/C++) for hardware design. Also this week, we check out a new Kickstarter campaign called eForge that hopes to make 3D printed electronics an everyday reality.  

Plotting a Course to Functional Safety

There are many roads to prosperity, but one must be taken. Inaction leads nowhere. - Robert Zoellick

Security is not implemented overnight. Standards don’t create themselves. And our design lives won’t get easier if security and standards aren’t addressed at every step of the game. In this week’s podcast, Brent Sherman (Intel), Adam Sherer (Cadence) and I chat about the challenges of security characterization within IP implementation and delivery in a functional safety flow and why Accelera is looking to EE design community help them steer a path steer forward to comprehensive standard in this space. Also this week, we take a closer look at how MIT is creating hydrogen peroxide out of thin air. (Spoiler Alert: It involves using just electricity, water and air!)

Get Smart(er)!

Work smart. Get things done. - Susan Wojcicki

What’s smarter than smart? This week’s episode of Amelia’s Weekly Fish Fry! Tim Ramsdale (CEO - Agile Analog) reveals how Agile Analog is changing the landscape of analog IP and why their unique design methodology sets their analog IP away from the rest of the pack. In our second interview this week, Tom Yates (Product VP - Nubix) joins us to discuss the current state of edge computing and how is Nubix helping embedded designers get the most out of their IoT and edge-based designs.

The Acceleration Situation

In this week’s episode of Fish Fry, Clay Johnson (CEO - CacheQ) joins us to discuss the history of processor performance demands and why today's designs require a variety of different technologies to increase compute performance. Clay and I also chat about the details of their QCC platform and how their platform is helping software developers leverage the benefits of heterogeneous distributed compute environments. Also this week, we investigate the details of a new whale-shaped nanorobot specifically designed for drug delivery by Dartmouth College and City University of Hong Kong.  

 

Up Up and Away

“I think everybody understands how important the cloud is.” - Marc Benioff

They say every cloud has a silver lining but does every silver lining have a cloud? In this week’s Fish Fry podcast, Craig Johnson (Cadence Design Systems) joins us to discuss a variety of cloud strategies. We investigate how priorities and usage models should influence our choice of cloud models and why different clouds for different folks is always the way to go. Also this week, we check out how a group of researchers at the University of ILL at Urbana-Champaign may  discovered the key to the future of long distance space travel. (Spoiler Alert: SALT!)

 

FPGA Fiesta

We’re serving up a double helping of field programmable goodness in this week’s episode of Amelia’s Weekly Fish Fry podcast. Dianne Kibbey (element14) and I dish about this year’s Path II Programmable design series. We discuss the details of this innovative program and how you sign up to participate in this FPGA-based program. Also this week, Geoff Tate (CEO - Flex Logix) and I chat about the history eFPGAs and the motivations behind the launch of their new nnMAX™ Inference Acceleration Architecture and InferX™ X1 Edge Inference Co-Processor.